Application of Spacer Filled Silicone Die Adhesive in Stacked Chip Technology

The increasing demand for feature content of portable electronic products drives requirements for smaller volume and lower cost device packaging. This has, in turn, led to the packaging industry’s interest in stacked chip technology, especially for memory applications. The growth of stacked chip package technology drove development of specific die adhesives that combine low cost with controlled thickness, critical for wirebonding multiple layers. Silicone, as a die adhesive material, shows many beneficial properties such as low moisture absorption and thermal stability especially for lead free needs. In stacked chip packages with conventional wire bonding, a spacer is needed to provide controlled bond line thickness, to meet wire bonding and molding tolerances for thin packages. While preform sheets can be used to maintain bond line uniformity, they are not always as easy to use in high volume manufacturing as liquid adhesives. This paper discusses testing of a two chip simulated memory stack package using a liquid die adhesive material based on a flexible silicone filled with spacer beads. Attributes of the spacer filled silicone adhesive are discussed, effects of process parameters on bond line thickness are demonstrated, and resistance to humidity and thermal reliability are evaluated. Wire bonding results show this low modulus material can be reliably assembled in stack applications.